
set WORKSPACE  $1
set TOP_MODULE $2
set TB_FILE_DIR $3

if {$argc > 3} {
    set GEN_WAVE $4
}

set SRC_FILES "${WORKSPACE}/*.sv" 
set TB_FILES "${TB_FILE_DIR}/*/*.sv"

vlib work   
vlib msim   
vmap frvwork work  
vlog "${WORKSPACE}/frv_types.sv"
vlog $SRC_FILES
vlog $TB_FILES

# do compile_axi.do

if {$argc > 3 && $GEN_WAVE == "genwave"} {
    vopt $TOP_MODULE +acc -o TOP_MODULE_OPT
    vsim TOP_MODULE_OPT
    # vcd file $TOP_MODULE.vcd
    # vcd add /tb_alu/_frv_iu_alu/*
    add wave -recursive -depth 10 *
} else {
    vsim $TOP_MODULE
}

run 1000us

exit
